
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 04:35:29 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fmadd_b15)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_29913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:89676*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89676*FLEN/8, x13, x9, x10)

inst_29914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f000007; valaddr_reg:x12; val_offset:89679*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89679*FLEN/8, x13, x9, x10)

inst_29915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:89682*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89682*FLEN/8, x13, x9, x10)

inst_29916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f000003; valaddr_reg:x12; val_offset:89685*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89685*FLEN/8, x13, x9, x10)

inst_29917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:89688*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89688*FLEN/8, x13, x9, x10)

inst_29918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f000001; valaddr_reg:x12; val_offset:89691*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89691*FLEN/8, x13, x9, x10)

inst_29919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:89694*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89694*FLEN/8, x13, x9, x10)

inst_29920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:89697*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89697*FLEN/8, x13, x9, x10)

inst_29921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f199999; valaddr_reg:x12; val_offset:89700*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89700*FLEN/8, x13, x9, x10)

inst_29922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f666666; valaddr_reg:x12; val_offset:89703*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89703*FLEN/8, x13, x9, x10)

inst_29923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:89706*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89706*FLEN/8, x13, x9, x10)

inst_29924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f444444; valaddr_reg:x12; val_offset:89709*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89709*FLEN/8, x13, x9, x10)

inst_29925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f249249; valaddr_reg:x12; val_offset:89712*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89712*FLEN/8, x13, x9, x10)

inst_29926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:89715*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89715*FLEN/8, x13, x9, x10)

inst_29927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f333333; valaddr_reg:x12; val_offset:89718*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89718*FLEN/8, x13, x9, x10)

inst_29928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea58981; op2val:0x4045f314;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:89721*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89721*FLEN/8, x13, x9, x10)

inst_29929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7fffff; valaddr_reg:x12; val_offset:89724*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89724*FLEN/8, x13, x9, x10)

inst_29930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f000000; valaddr_reg:x12; val_offset:89727*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89727*FLEN/8, x13, x9, x10)

inst_29931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f3fffff; valaddr_reg:x12; val_offset:89730*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89730*FLEN/8, x13, x9, x10)

inst_29932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f400000; valaddr_reg:x12; val_offset:89733*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89733*FLEN/8, x13, x9, x10)

inst_29933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f1fffff; valaddr_reg:x12; val_offset:89736*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89736*FLEN/8, x13, x9, x10)

inst_29934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f600000; valaddr_reg:x12; val_offset:89739*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89739*FLEN/8, x13, x9, x10)

inst_29935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f0fffff; valaddr_reg:x12; val_offset:89742*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89742*FLEN/8, x13, x9, x10)

inst_29936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f700000; valaddr_reg:x12; val_offset:89745*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89745*FLEN/8, x13, x9, x10)

inst_29937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f07ffff; valaddr_reg:x12; val_offset:89748*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89748*FLEN/8, x13, x9, x10)

inst_29938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f780000; valaddr_reg:x12; val_offset:89751*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89751*FLEN/8, x13, x9, x10)

inst_29939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f03ffff; valaddr_reg:x12; val_offset:89754*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89754*FLEN/8, x13, x9, x10)

inst_29940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7c0000; valaddr_reg:x12; val_offset:89757*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89757*FLEN/8, x13, x9, x10)

inst_29941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f01ffff; valaddr_reg:x12; val_offset:89760*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89760*FLEN/8, x13, x9, x10)

inst_29942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7e0000; valaddr_reg:x12; val_offset:89763*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89763*FLEN/8, x13, x9, x10)

inst_29943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f00ffff; valaddr_reg:x12; val_offset:89766*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89766*FLEN/8, x13, x9, x10)

inst_29944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7f0000; valaddr_reg:x12; val_offset:89769*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89769*FLEN/8, x13, x9, x10)

inst_29945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f007fff; valaddr_reg:x12; val_offset:89772*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89772*FLEN/8, x13, x9, x10)

inst_29946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7f8000; valaddr_reg:x12; val_offset:89775*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89775*FLEN/8, x13, x9, x10)

inst_29947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f003fff; valaddr_reg:x12; val_offset:89778*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89778*FLEN/8, x13, x9, x10)

inst_29948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7fc000; valaddr_reg:x12; val_offset:89781*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89781*FLEN/8, x13, x9, x10)

inst_29949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f001fff; valaddr_reg:x12; val_offset:89784*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89784*FLEN/8, x13, x9, x10)

inst_29950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7fe000; valaddr_reg:x12; val_offset:89787*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89787*FLEN/8, x13, x9, x10)

inst_29951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f000fff; valaddr_reg:x12; val_offset:89790*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89790*FLEN/8, x13, x9, x10)

inst_29952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7ff000; valaddr_reg:x12; val_offset:89793*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89793*FLEN/8, x13, x9, x10)

inst_29953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f0007ff; valaddr_reg:x12; val_offset:89796*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89796*FLEN/8, x13, x9, x10)

inst_29954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7ff800; valaddr_reg:x12; val_offset:89799*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89799*FLEN/8, x13, x9, x10)

inst_29955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f0003ff; valaddr_reg:x12; val_offset:89802*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89802*FLEN/8, x13, x9, x10)

inst_29956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7ffc00; valaddr_reg:x12; val_offset:89805*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89805*FLEN/8, x13, x9, x10)

inst_29957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f0001ff; valaddr_reg:x12; val_offset:89808*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89808*FLEN/8, x13, x9, x10)

inst_29958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7ffe00; valaddr_reg:x12; val_offset:89811*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89811*FLEN/8, x13, x9, x10)

inst_29959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f0000ff; valaddr_reg:x12; val_offset:89814*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89814*FLEN/8, x13, x9, x10)

inst_29960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7fff00; valaddr_reg:x12; val_offset:89817*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89817*FLEN/8, x13, x9, x10)

inst_29961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f00007f; valaddr_reg:x12; val_offset:89820*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89820*FLEN/8, x13, x9, x10)

inst_29962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7fff80; valaddr_reg:x12; val_offset:89823*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89823*FLEN/8, x13, x9, x10)

inst_29963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f00003f; valaddr_reg:x12; val_offset:89826*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89826*FLEN/8, x13, x9, x10)

inst_29964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7fffc0; valaddr_reg:x12; val_offset:89829*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89829*FLEN/8, x13, x9, x10)

inst_29965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f00001f; valaddr_reg:x12; val_offset:89832*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89832*FLEN/8, x13, x9, x10)

inst_29966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7fffe0; valaddr_reg:x12; val_offset:89835*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89835*FLEN/8, x13, x9, x10)

inst_29967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f00000f; valaddr_reg:x12; val_offset:89838*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89838*FLEN/8, x13, x9, x10)

inst_29968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7ffff0; valaddr_reg:x12; val_offset:89841*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89841*FLEN/8, x13, x9, x10)

inst_29969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f000007; valaddr_reg:x12; val_offset:89844*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89844*FLEN/8, x13, x9, x10)

inst_29970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7ffff8; valaddr_reg:x12; val_offset:89847*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89847*FLEN/8, x13, x9, x10)

inst_29971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f000003; valaddr_reg:x12; val_offset:89850*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89850*FLEN/8, x13, x9, x10)

inst_29972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7ffffc; valaddr_reg:x12; val_offset:89853*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89853*FLEN/8, x13, x9, x10)

inst_29973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f000001; valaddr_reg:x12; val_offset:89856*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89856*FLEN/8, x13, x9, x10)

inst_29974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x5f7ffffe; valaddr_reg:x12; val_offset:89859*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89859*FLEN/8, x13, x9, x10)

inst_29975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:89862*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89862*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_234)
inst_29976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f000007; valaddr_reg:x12; val_offset:89865*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89865*FLEN/8, x13, x9, x10)

inst_29977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:89868*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89868*FLEN/8, x13, x9, x10)

inst_29978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f000003; valaddr_reg:x12; val_offset:89871*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89871*FLEN/8, x13, x9, x10)

inst_29979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:89874*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89874*FLEN/8, x13, x9, x10)

inst_29980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f000001; valaddr_reg:x12; val_offset:89877*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89877*FLEN/8, x13, x9, x10)

inst_29981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:89880*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89880*FLEN/8, x13, x9, x10)

inst_29982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:89883*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89883*FLEN/8, x13, x9, x10)

inst_29983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f199999; valaddr_reg:x12; val_offset:89886*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89886*FLEN/8, x13, x9, x10)

inst_29984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f666666; valaddr_reg:x12; val_offset:89889*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89889*FLEN/8, x13, x9, x10)

inst_29985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:89892*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89892*FLEN/8, x13, x9, x10)

inst_29986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f444444; valaddr_reg:x12; val_offset:89895*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89895*FLEN/8, x13, x9, x10)

inst_29987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f249249; valaddr_reg:x12; val_offset:89898*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89898*FLEN/8, x13, x9, x10)

inst_29988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:89901*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89901*FLEN/8, x13, x9, x10)

inst_29989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f333333; valaddr_reg:x12; val_offset:89904*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89904*FLEN/8, x13, x9, x10)

inst_29990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea022af; op2val:0x404ca070;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:89907*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89907*FLEN/8, x13, x9, x10)

inst_29991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fffffff; valaddr_reg:x12; val_offset:89910*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89910*FLEN/8, x13, x9, x10)

inst_29992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f800000; valaddr_reg:x12; val_offset:89913*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89913*FLEN/8, x13, x9, x10)

inst_29993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fbfffff; valaddr_reg:x12; val_offset:89916*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89916*FLEN/8, x13, x9, x10)

inst_29994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fc00000; valaddr_reg:x12; val_offset:89919*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89919*FLEN/8, x13, x9, x10)

inst_29995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f9fffff; valaddr_reg:x12; val_offset:89922*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89922*FLEN/8, x13, x9, x10)

inst_29996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fe00000; valaddr_reg:x12; val_offset:89925*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89925*FLEN/8, x13, x9, x10)

inst_29997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f8fffff; valaddr_reg:x12; val_offset:89928*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89928*FLEN/8, x13, x9, x10)

inst_29998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ff00000; valaddr_reg:x12; val_offset:89931*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89931*FLEN/8, x13, x9, x10)

inst_29999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f87ffff; valaddr_reg:x12; val_offset:89934*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89934*FLEN/8, x13, x9, x10)

inst_30000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ff80000; valaddr_reg:x12; val_offset:89937*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89937*FLEN/8, x13, x9, x10)

inst_30001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f83ffff; valaddr_reg:x12; val_offset:89940*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89940*FLEN/8, x13, x9, x10)

inst_30002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffc0000; valaddr_reg:x12; val_offset:89943*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89943*FLEN/8, x13, x9, x10)

inst_30003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f81ffff; valaddr_reg:x12; val_offset:89946*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89946*FLEN/8, x13, x9, x10)

inst_30004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffe0000; valaddr_reg:x12; val_offset:89949*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89949*FLEN/8, x13, x9, x10)

inst_30005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f80ffff; valaddr_reg:x12; val_offset:89952*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89952*FLEN/8, x13, x9, x10)

inst_30006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fff0000; valaddr_reg:x12; val_offset:89955*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89955*FLEN/8, x13, x9, x10)

inst_30007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f807fff; valaddr_reg:x12; val_offset:89958*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89958*FLEN/8, x13, x9, x10)

inst_30008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fff8000; valaddr_reg:x12; val_offset:89961*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89961*FLEN/8, x13, x9, x10)

inst_30009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f803fff; valaddr_reg:x12; val_offset:89964*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89964*FLEN/8, x13, x9, x10)

inst_30010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fffc000; valaddr_reg:x12; val_offset:89967*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89967*FLEN/8, x13, x9, x10)

inst_30011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f801fff; valaddr_reg:x12; val_offset:89970*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89970*FLEN/8, x13, x9, x10)

inst_30012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fffe000; valaddr_reg:x12; val_offset:89973*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89973*FLEN/8, x13, x9, x10)

inst_30013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f800fff; valaddr_reg:x12; val_offset:89976*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89976*FLEN/8, x13, x9, x10)

inst_30014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffff000; valaddr_reg:x12; val_offset:89979*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89979*FLEN/8, x13, x9, x10)

inst_30015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f8007ff; valaddr_reg:x12; val_offset:89982*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89982*FLEN/8, x13, x9, x10)

inst_30016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffff800; valaddr_reg:x12; val_offset:89985*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89985*FLEN/8, x13, x9, x10)

inst_30017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f8003ff; valaddr_reg:x12; val_offset:89988*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89988*FLEN/8, x13, x9, x10)

inst_30018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffffc00; valaddr_reg:x12; val_offset:89991*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89991*FLEN/8, x13, x9, x10)

inst_30019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f8001ff; valaddr_reg:x12; val_offset:89994*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89994*FLEN/8, x13, x9, x10)

inst_30020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffffe00; valaddr_reg:x12; val_offset:89997*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 89997*FLEN/8, x13, x9, x10)

inst_30021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f8000ff; valaddr_reg:x12; val_offset:90000*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90000*FLEN/8, x13, x9, x10)

inst_30022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fffff00; valaddr_reg:x12; val_offset:90003*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90003*FLEN/8, x13, x9, x10)

inst_30023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f80007f; valaddr_reg:x12; val_offset:90006*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90006*FLEN/8, x13, x9, x10)

inst_30024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fffff80; valaddr_reg:x12; val_offset:90009*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90009*FLEN/8, x13, x9, x10)

inst_30025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f80003f; valaddr_reg:x12; val_offset:90012*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90012*FLEN/8, x13, x9, x10)

inst_30026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fffffc0; valaddr_reg:x12; val_offset:90015*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90015*FLEN/8, x13, x9, x10)

inst_30027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f80001f; valaddr_reg:x12; val_offset:90018*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90018*FLEN/8, x13, x9, x10)

inst_30028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5fffffe0; valaddr_reg:x12; val_offset:90021*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90021*FLEN/8, x13, x9, x10)

inst_30029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f80000f; valaddr_reg:x12; val_offset:90024*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90024*FLEN/8, x13, x9, x10)

inst_30030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffffff0; valaddr_reg:x12; val_offset:90027*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90027*FLEN/8, x13, x9, x10)

inst_30031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f800007; valaddr_reg:x12; val_offset:90030*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90030*FLEN/8, x13, x9, x10)

inst_30032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffffff8; valaddr_reg:x12; val_offset:90033*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90033*FLEN/8, x13, x9, x10)

inst_30033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f800003; valaddr_reg:x12; val_offset:90036*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90036*FLEN/8, x13, x9, x10)

inst_30034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffffffc; valaddr_reg:x12; val_offset:90039*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90039*FLEN/8, x13, x9, x10)

inst_30035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5f800001; valaddr_reg:x12; val_offset:90042*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90042*FLEN/8, x13, x9, x10)

inst_30036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x5ffffffe; valaddr_reg:x12; val_offset:90045*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90045*FLEN/8, x13, x9, x10)

inst_30037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:90048*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90048*FLEN/8, x13, x9, x10)

inst_30038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f000007; valaddr_reg:x12; val_offset:90051*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90051*FLEN/8, x13, x9, x10)

inst_30039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:90054*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90054*FLEN/8, x13, x9, x10)

inst_30040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f000003; valaddr_reg:x12; val_offset:90057*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90057*FLEN/8, x13, x9, x10)

inst_30041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:90060*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90060*FLEN/8, x13, x9, x10)

inst_30042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f000001; valaddr_reg:x12; val_offset:90063*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90063*FLEN/8, x13, x9, x10)

inst_30043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:90066*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90066*FLEN/8, x13, x9, x10)

inst_30044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:90069*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90069*FLEN/8, x13, x9, x10)

inst_30045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f199999; valaddr_reg:x12; val_offset:90072*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90072*FLEN/8, x13, x9, x10)

inst_30046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f666666; valaddr_reg:x12; val_offset:90075*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90075*FLEN/8, x13, x9, x10)

inst_30047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:90078*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90078*FLEN/8, x13, x9, x10)

inst_30048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f444444; valaddr_reg:x12; val_offset:90081*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90081*FLEN/8, x13, x9, x10)

inst_30049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f249249; valaddr_reg:x12; val_offset:90084*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90084*FLEN/8, x13, x9, x10)

inst_30050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:90087*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90087*FLEN/8, x13, x9, x10)

inst_30051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f333333; valaddr_reg:x12; val_offset:90090*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90090*FLEN/8, x13, x9, x10)

inst_30052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebeb433; op2val:0x402bd39a;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:90093*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90093*FLEN/8, x13, x9, x10)

inst_30053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607fffff; valaddr_reg:x12; val_offset:90096*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90096*FLEN/8, x13, x9, x10)

inst_30054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60000000; valaddr_reg:x12; val_offset:90099*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90099*FLEN/8, x13, x9, x10)

inst_30055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x603fffff; valaddr_reg:x12; val_offset:90102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90102*FLEN/8, x13, x9, x10)

inst_30056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60400000; valaddr_reg:x12; val_offset:90105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90105*FLEN/8, x13, x9, x10)

inst_30057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x601fffff; valaddr_reg:x12; val_offset:90108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90108*FLEN/8, x13, x9, x10)

inst_30058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60600000; valaddr_reg:x12; val_offset:90111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90111*FLEN/8, x13, x9, x10)

inst_30059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x600fffff; valaddr_reg:x12; val_offset:90114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90114*FLEN/8, x13, x9, x10)

inst_30060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60700000; valaddr_reg:x12; val_offset:90117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90117*FLEN/8, x13, x9, x10)

inst_30061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x6007ffff; valaddr_reg:x12; val_offset:90120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90120*FLEN/8, x13, x9, x10)

inst_30062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60780000; valaddr_reg:x12; val_offset:90123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90123*FLEN/8, x13, x9, x10)

inst_30063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x6003ffff; valaddr_reg:x12; val_offset:90126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90126*FLEN/8, x13, x9, x10)

inst_30064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607c0000; valaddr_reg:x12; val_offset:90129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90129*FLEN/8, x13, x9, x10)

inst_30065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x6001ffff; valaddr_reg:x12; val_offset:90132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90132*FLEN/8, x13, x9, x10)

inst_30066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607e0000; valaddr_reg:x12; val_offset:90135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90135*FLEN/8, x13, x9, x10)

inst_30067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x6000ffff; valaddr_reg:x12; val_offset:90138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90138*FLEN/8, x13, x9, x10)

inst_30068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607f0000; valaddr_reg:x12; val_offset:90141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90141*FLEN/8, x13, x9, x10)

inst_30069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60007fff; valaddr_reg:x12; val_offset:90144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90144*FLEN/8, x13, x9, x10)

inst_30070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607f8000; valaddr_reg:x12; val_offset:90147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90147*FLEN/8, x13, x9, x10)

inst_30071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60003fff; valaddr_reg:x12; val_offset:90150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90150*FLEN/8, x13, x9, x10)

inst_30072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607fc000; valaddr_reg:x12; val_offset:90153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90153*FLEN/8, x13, x9, x10)

inst_30073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60001fff; valaddr_reg:x12; val_offset:90156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90156*FLEN/8, x13, x9, x10)

inst_30074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607fe000; valaddr_reg:x12; val_offset:90159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90159*FLEN/8, x13, x9, x10)

inst_30075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60000fff; valaddr_reg:x12; val_offset:90162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90162*FLEN/8, x13, x9, x10)

inst_30076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607ff000; valaddr_reg:x12; val_offset:90165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90165*FLEN/8, x13, x9, x10)

inst_30077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x600007ff; valaddr_reg:x12; val_offset:90168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90168*FLEN/8, x13, x9, x10)

inst_30078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607ff800; valaddr_reg:x12; val_offset:90171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90171*FLEN/8, x13, x9, x10)

inst_30079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x600003ff; valaddr_reg:x12; val_offset:90174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90174*FLEN/8, x13, x9, x10)

inst_30080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607ffc00; valaddr_reg:x12; val_offset:90177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90177*FLEN/8, x13, x9, x10)

inst_30081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x600001ff; valaddr_reg:x12; val_offset:90180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90180*FLEN/8, x13, x9, x10)

inst_30082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607ffe00; valaddr_reg:x12; val_offset:90183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90183*FLEN/8, x13, x9, x10)

inst_30083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x600000ff; valaddr_reg:x12; val_offset:90186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90186*FLEN/8, x13, x9, x10)

inst_30084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607fff00; valaddr_reg:x12; val_offset:90189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90189*FLEN/8, x13, x9, x10)

inst_30085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x6000007f; valaddr_reg:x12; val_offset:90192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90192*FLEN/8, x13, x9, x10)

inst_30086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607fff80; valaddr_reg:x12; val_offset:90195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90195*FLEN/8, x13, x9, x10)

inst_30087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x6000003f; valaddr_reg:x12; val_offset:90198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90198*FLEN/8, x13, x9, x10)

inst_30088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607fffc0; valaddr_reg:x12; val_offset:90201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90201*FLEN/8, x13, x9, x10)

inst_30089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x6000001f; valaddr_reg:x12; val_offset:90204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90204*FLEN/8, x13, x9, x10)

inst_30090:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607fffe0; valaddr_reg:x12; val_offset:90207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90207*FLEN/8, x13, x9, x10)

inst_30091:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x6000000f; valaddr_reg:x12; val_offset:90210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90210*FLEN/8, x13, x9, x10)

inst_30092:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607ffff0; valaddr_reg:x12; val_offset:90213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90213*FLEN/8, x13, x9, x10)

inst_30093:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60000007; valaddr_reg:x12; val_offset:90216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90216*FLEN/8, x13, x9, x10)

inst_30094:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607ffff8; valaddr_reg:x12; val_offset:90219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90219*FLEN/8, x13, x9, x10)

inst_30095:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60000003; valaddr_reg:x12; val_offset:90222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90222*FLEN/8, x13, x9, x10)

inst_30096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607ffffc; valaddr_reg:x12; val_offset:90225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90225*FLEN/8, x13, x9, x10)

inst_30097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x60000001; valaddr_reg:x12; val_offset:90228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90228*FLEN/8, x13, x9, x10)

inst_30098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x607ffffe; valaddr_reg:x12; val_offset:90231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90231*FLEN/8, x13, x9, x10)

inst_30099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:90234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90234*FLEN/8, x13, x9, x10)

inst_30100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f000007; valaddr_reg:x12; val_offset:90237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90237*FLEN/8, x13, x9, x10)

inst_30101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:90240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90240*FLEN/8, x13, x9, x10)

inst_30102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f000003; valaddr_reg:x12; val_offset:90243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90243*FLEN/8, x13, x9, x10)

inst_30103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:90246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90246*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_235)
inst_30104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f000001; valaddr_reg:x12; val_offset:90249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90249*FLEN/8, x13, x9, x10)

inst_30105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:90252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90252*FLEN/8, x13, x9, x10)

inst_30106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:90255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90255*FLEN/8, x13, x9, x10)

inst_30107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f199999; valaddr_reg:x12; val_offset:90258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90258*FLEN/8, x13, x9, x10)

inst_30108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f666666; valaddr_reg:x12; val_offset:90261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90261*FLEN/8, x13, x9, x10)

inst_30109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:90264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90264*FLEN/8, x13, x9, x10)

inst_30110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f444444; valaddr_reg:x12; val_offset:90267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90267*FLEN/8, x13, x9, x10)

inst_30111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f249249; valaddr_reg:x12; val_offset:90270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90270*FLEN/8, x13, x9, x10)

inst_30112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:90273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90273*FLEN/8, x13, x9, x10)

inst_30113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f333333; valaddr_reg:x12; val_offset:90276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90276*FLEN/8, x13, x9, x10)

inst_30114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f25e629; op2val:0x3fc58486;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:90279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90279*FLEN/8, x13, x9, x10)

inst_30115:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ffffff; valaddr_reg:x12; val_offset:90282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90282*FLEN/8, x13, x9, x10)

inst_30116:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60800000; valaddr_reg:x12; val_offset:90285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90285*FLEN/8, x13, x9, x10)

inst_30117:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60bfffff; valaddr_reg:x12; val_offset:90288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90288*FLEN/8, x13, x9, x10)

inst_30118:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60c00000; valaddr_reg:x12; val_offset:90291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90291*FLEN/8, x13, x9, x10)

inst_30119:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x609fffff; valaddr_reg:x12; val_offset:90294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90294*FLEN/8, x13, x9, x10)

inst_30120:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60e00000; valaddr_reg:x12; val_offset:90297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90297*FLEN/8, x13, x9, x10)

inst_30121:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x608fffff; valaddr_reg:x12; val_offset:90300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90300*FLEN/8, x13, x9, x10)

inst_30122:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60f00000; valaddr_reg:x12; val_offset:90303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90303*FLEN/8, x13, x9, x10)

inst_30123:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x6087ffff; valaddr_reg:x12; val_offset:90306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90306*FLEN/8, x13, x9, x10)

inst_30124:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60f80000; valaddr_reg:x12; val_offset:90309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90309*FLEN/8, x13, x9, x10)

inst_30125:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x6083ffff; valaddr_reg:x12; val_offset:90312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90312*FLEN/8, x13, x9, x10)

inst_30126:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fc0000; valaddr_reg:x12; val_offset:90315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90315*FLEN/8, x13, x9, x10)

inst_30127:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x6081ffff; valaddr_reg:x12; val_offset:90318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90318*FLEN/8, x13, x9, x10)

inst_30128:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fe0000; valaddr_reg:x12; val_offset:90321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90321*FLEN/8, x13, x9, x10)

inst_30129:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x6080ffff; valaddr_reg:x12; val_offset:90324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90324*FLEN/8, x13, x9, x10)

inst_30130:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ff0000; valaddr_reg:x12; val_offset:90327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90327*FLEN/8, x13, x9, x10)

inst_30131:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60807fff; valaddr_reg:x12; val_offset:90330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90330*FLEN/8, x13, x9, x10)

inst_30132:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ff8000; valaddr_reg:x12; val_offset:90333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90333*FLEN/8, x13, x9, x10)

inst_30133:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60803fff; valaddr_reg:x12; val_offset:90336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90336*FLEN/8, x13, x9, x10)

inst_30134:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ffc000; valaddr_reg:x12; val_offset:90339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90339*FLEN/8, x13, x9, x10)

inst_30135:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60801fff; valaddr_reg:x12; val_offset:90342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90342*FLEN/8, x13, x9, x10)

inst_30136:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ffe000; valaddr_reg:x12; val_offset:90345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90345*FLEN/8, x13, x9, x10)

inst_30137:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60800fff; valaddr_reg:x12; val_offset:90348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90348*FLEN/8, x13, x9, x10)

inst_30138:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fff000; valaddr_reg:x12; val_offset:90351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90351*FLEN/8, x13, x9, x10)

inst_30139:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x608007ff; valaddr_reg:x12; val_offset:90354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90354*FLEN/8, x13, x9, x10)

inst_30140:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fff800; valaddr_reg:x12; val_offset:90357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90357*FLEN/8, x13, x9, x10)

inst_30141:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x608003ff; valaddr_reg:x12; val_offset:90360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90360*FLEN/8, x13, x9, x10)

inst_30142:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fffc00; valaddr_reg:x12; val_offset:90363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90363*FLEN/8, x13, x9, x10)

inst_30143:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x608001ff; valaddr_reg:x12; val_offset:90366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90366*FLEN/8, x13, x9, x10)

inst_30144:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fffe00; valaddr_reg:x12; val_offset:90369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90369*FLEN/8, x13, x9, x10)

inst_30145:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x608000ff; valaddr_reg:x12; val_offset:90372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90372*FLEN/8, x13, x9, x10)

inst_30146:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ffff00; valaddr_reg:x12; val_offset:90375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90375*FLEN/8, x13, x9, x10)

inst_30147:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x6080007f; valaddr_reg:x12; val_offset:90378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90378*FLEN/8, x13, x9, x10)

inst_30148:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ffff80; valaddr_reg:x12; val_offset:90381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90381*FLEN/8, x13, x9, x10)

inst_30149:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x6080003f; valaddr_reg:x12; val_offset:90384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90384*FLEN/8, x13, x9, x10)

inst_30150:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ffffc0; valaddr_reg:x12; val_offset:90387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90387*FLEN/8, x13, x9, x10)

inst_30151:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x6080001f; valaddr_reg:x12; val_offset:90390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90390*FLEN/8, x13, x9, x10)

inst_30152:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60ffffe0; valaddr_reg:x12; val_offset:90393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90393*FLEN/8, x13, x9, x10)

inst_30153:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x6080000f; valaddr_reg:x12; val_offset:90396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90396*FLEN/8, x13, x9, x10)

inst_30154:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fffff0; valaddr_reg:x12; val_offset:90399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90399*FLEN/8, x13, x9, x10)

inst_30155:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60800007; valaddr_reg:x12; val_offset:90402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90402*FLEN/8, x13, x9, x10)

inst_30156:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fffff8; valaddr_reg:x12; val_offset:90405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90405*FLEN/8, x13, x9, x10)

inst_30157:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60800003; valaddr_reg:x12; val_offset:90408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90408*FLEN/8, x13, x9, x10)

inst_30158:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fffffc; valaddr_reg:x12; val_offset:90411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90411*FLEN/8, x13, x9, x10)

inst_30159:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60800001; valaddr_reg:x12; val_offset:90414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90414*FLEN/8, x13, x9, x10)

inst_30160:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x60fffffe; valaddr_reg:x12; val_offset:90417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90417*FLEN/8, x13, x9, x10)

inst_30161:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:90420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90420*FLEN/8, x13, x9, x10)

inst_30162:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f000007; valaddr_reg:x12; val_offset:90423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90423*FLEN/8, x13, x9, x10)

inst_30163:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:90426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90426*FLEN/8, x13, x9, x10)

inst_30164:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f000003; valaddr_reg:x12; val_offset:90429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90429*FLEN/8, x13, x9, x10)

inst_30165:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:90432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90432*FLEN/8, x13, x9, x10)

inst_30166:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f000001; valaddr_reg:x12; val_offset:90435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90435*FLEN/8, x13, x9, x10)

inst_30167:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:90438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90438*FLEN/8, x13, x9, x10)

inst_30168:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:90441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90441*FLEN/8, x13, x9, x10)

inst_30169:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f199999; valaddr_reg:x12; val_offset:90444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90444*FLEN/8, x13, x9, x10)

inst_30170:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f666666; valaddr_reg:x12; val_offset:90447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90447*FLEN/8, x13, x9, x10)

inst_30171:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:90450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90450*FLEN/8, x13, x9, x10)

inst_30172:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f444444; valaddr_reg:x12; val_offset:90453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90453*FLEN/8, x13, x9, x10)

inst_30173:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f249249; valaddr_reg:x12; val_offset:90456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90456*FLEN/8, x13, x9, x10)

inst_30174:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:90459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90459*FLEN/8, x13, x9, x10)

inst_30175:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f333333; valaddr_reg:x12; val_offset:90462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90462*FLEN/8, x13, x9, x10)

inst_30176:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e79371f; op2val:0x40837c14;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:90465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90465*FLEN/8, x13, x9, x10)

inst_30177:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617fffff; valaddr_reg:x12; val_offset:90468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90468*FLEN/8, x13, x9, x10)

inst_30178:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61000000; valaddr_reg:x12; val_offset:90471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90471*FLEN/8, x13, x9, x10)

inst_30179:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x613fffff; valaddr_reg:x12; val_offset:90474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90474*FLEN/8, x13, x9, x10)

inst_30180:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61400000; valaddr_reg:x12; val_offset:90477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90477*FLEN/8, x13, x9, x10)

inst_30181:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x611fffff; valaddr_reg:x12; val_offset:90480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90480*FLEN/8, x13, x9, x10)

inst_30182:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61600000; valaddr_reg:x12; val_offset:90483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90483*FLEN/8, x13, x9, x10)

inst_30183:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x610fffff; valaddr_reg:x12; val_offset:90486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90486*FLEN/8, x13, x9, x10)

inst_30184:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61700000; valaddr_reg:x12; val_offset:90489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90489*FLEN/8, x13, x9, x10)

inst_30185:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x6107ffff; valaddr_reg:x12; val_offset:90492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90492*FLEN/8, x13, x9, x10)

inst_30186:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61780000; valaddr_reg:x12; val_offset:90495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90495*FLEN/8, x13, x9, x10)

inst_30187:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x6103ffff; valaddr_reg:x12; val_offset:90498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90498*FLEN/8, x13, x9, x10)

inst_30188:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617c0000; valaddr_reg:x12; val_offset:90501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90501*FLEN/8, x13, x9, x10)

inst_30189:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x6101ffff; valaddr_reg:x12; val_offset:90504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90504*FLEN/8, x13, x9, x10)

inst_30190:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617e0000; valaddr_reg:x12; val_offset:90507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90507*FLEN/8, x13, x9, x10)

inst_30191:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x6100ffff; valaddr_reg:x12; val_offset:90510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90510*FLEN/8, x13, x9, x10)

inst_30192:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617f0000; valaddr_reg:x12; val_offset:90513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90513*FLEN/8, x13, x9, x10)

inst_30193:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61007fff; valaddr_reg:x12; val_offset:90516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90516*FLEN/8, x13, x9, x10)

inst_30194:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617f8000; valaddr_reg:x12; val_offset:90519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90519*FLEN/8, x13, x9, x10)

inst_30195:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61003fff; valaddr_reg:x12; val_offset:90522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90522*FLEN/8, x13, x9, x10)

inst_30196:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617fc000; valaddr_reg:x12; val_offset:90525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90525*FLEN/8, x13, x9, x10)

inst_30197:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61001fff; valaddr_reg:x12; val_offset:90528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90528*FLEN/8, x13, x9, x10)

inst_30198:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617fe000; valaddr_reg:x12; val_offset:90531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90531*FLEN/8, x13, x9, x10)

inst_30199:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61000fff; valaddr_reg:x12; val_offset:90534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90534*FLEN/8, x13, x9, x10)

inst_30200:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617ff000; valaddr_reg:x12; val_offset:90537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90537*FLEN/8, x13, x9, x10)

inst_30201:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x610007ff; valaddr_reg:x12; val_offset:90540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90540*FLEN/8, x13, x9, x10)

inst_30202:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617ff800; valaddr_reg:x12; val_offset:90543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90543*FLEN/8, x13, x9, x10)

inst_30203:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x610003ff; valaddr_reg:x12; val_offset:90546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90546*FLEN/8, x13, x9, x10)

inst_30204:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617ffc00; valaddr_reg:x12; val_offset:90549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90549*FLEN/8, x13, x9, x10)

inst_30205:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x610001ff; valaddr_reg:x12; val_offset:90552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90552*FLEN/8, x13, x9, x10)

inst_30206:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617ffe00; valaddr_reg:x12; val_offset:90555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90555*FLEN/8, x13, x9, x10)

inst_30207:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x610000ff; valaddr_reg:x12; val_offset:90558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90558*FLEN/8, x13, x9, x10)

inst_30208:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617fff00; valaddr_reg:x12; val_offset:90561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90561*FLEN/8, x13, x9, x10)

inst_30209:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x6100007f; valaddr_reg:x12; val_offset:90564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90564*FLEN/8, x13, x9, x10)

inst_30210:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617fff80; valaddr_reg:x12; val_offset:90567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90567*FLEN/8, x13, x9, x10)

inst_30211:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x6100003f; valaddr_reg:x12; val_offset:90570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90570*FLEN/8, x13, x9, x10)

inst_30212:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617fffc0; valaddr_reg:x12; val_offset:90573*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90573*FLEN/8, x13, x9, x10)

inst_30213:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x6100001f; valaddr_reg:x12; val_offset:90576*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90576*FLEN/8, x13, x9, x10)

inst_30214:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617fffe0; valaddr_reg:x12; val_offset:90579*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90579*FLEN/8, x13, x9, x10)

inst_30215:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x6100000f; valaddr_reg:x12; val_offset:90582*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90582*FLEN/8, x13, x9, x10)

inst_30216:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617ffff0; valaddr_reg:x12; val_offset:90585*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90585*FLEN/8, x13, x9, x10)

inst_30217:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61000007; valaddr_reg:x12; val_offset:90588*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90588*FLEN/8, x13, x9, x10)

inst_30218:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617ffff8; valaddr_reg:x12; val_offset:90591*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90591*FLEN/8, x13, x9, x10)

inst_30219:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61000003; valaddr_reg:x12; val_offset:90594*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90594*FLEN/8, x13, x9, x10)

inst_30220:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617ffffc; valaddr_reg:x12; val_offset:90597*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90597*FLEN/8, x13, x9, x10)

inst_30221:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x61000001; valaddr_reg:x12; val_offset:90600*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90600*FLEN/8, x13, x9, x10)

inst_30222:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x617ffffe; valaddr_reg:x12; val_offset:90603*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90603*FLEN/8, x13, x9, x10)

inst_30223:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:90606*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90606*FLEN/8, x13, x9, x10)

inst_30224:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f000007; valaddr_reg:x12; val_offset:90609*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90609*FLEN/8, x13, x9, x10)

inst_30225:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:90612*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90612*FLEN/8, x13, x9, x10)

inst_30226:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f000003; valaddr_reg:x12; val_offset:90615*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90615*FLEN/8, x13, x9, x10)

inst_30227:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:90618*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90618*FLEN/8, x13, x9, x10)

inst_30228:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f000001; valaddr_reg:x12; val_offset:90621*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90621*FLEN/8, x13, x9, x10)

inst_30229:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:90624*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90624*FLEN/8, x13, x9, x10)

inst_30230:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:90627*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90627*FLEN/8, x13, x9, x10)

inst_30231:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f199999; valaddr_reg:x12; val_offset:90630*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90630*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_236)
inst_30232:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f666666; valaddr_reg:x12; val_offset:90633*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90633*FLEN/8, x13, x9, x10)

inst_30233:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:90636*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90636*FLEN/8, x13, x9, x10)

inst_30234:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f444444; valaddr_reg:x12; val_offset:90639*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90639*FLEN/8, x13, x9, x10)

inst_30235:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f249249; valaddr_reg:x12; val_offset:90642*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90642*FLEN/8, x13, x9, x10)

inst_30236:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:90645*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90645*FLEN/8, x13, x9, x10)

inst_30237:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f333333; valaddr_reg:x12; val_offset:90648*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90648*FLEN/8, x13, x9, x10)

inst_30238:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e41fc69; op2val:0x40a8eb5e;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:90651*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90651*FLEN/8, x13, x9, x10)

inst_30239:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffffff; valaddr_reg:x12; val_offset:90654*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90654*FLEN/8, x13, x9, x10)

inst_30240:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800000; valaddr_reg:x12; val_offset:90657*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90657*FLEN/8, x13, x9, x10)

inst_30241:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61bfffff; valaddr_reg:x12; val_offset:90660*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90660*FLEN/8, x13, x9, x10)

inst_30242:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61c00000; valaddr_reg:x12; val_offset:90663*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90663*FLEN/8, x13, x9, x10)

inst_30243:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x619fffff; valaddr_reg:x12; val_offset:90666*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90666*FLEN/8, x13, x9, x10)

inst_30244:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61e00000; valaddr_reg:x12; val_offset:90669*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90669*FLEN/8, x13, x9, x10)

inst_30245:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618fffff; valaddr_reg:x12; val_offset:90672*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90672*FLEN/8, x13, x9, x10)

inst_30246:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61f00000; valaddr_reg:x12; val_offset:90675*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90675*FLEN/8, x13, x9, x10)

inst_30247:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6187ffff; valaddr_reg:x12; val_offset:90678*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90678*FLEN/8, x13, x9, x10)

inst_30248:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61f80000; valaddr_reg:x12; val_offset:90681*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90681*FLEN/8, x13, x9, x10)

inst_30249:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6183ffff; valaddr_reg:x12; val_offset:90684*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90684*FLEN/8, x13, x9, x10)

inst_30250:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fc0000; valaddr_reg:x12; val_offset:90687*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90687*FLEN/8, x13, x9, x10)

inst_30251:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6181ffff; valaddr_reg:x12; val_offset:90690*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90690*FLEN/8, x13, x9, x10)

inst_30252:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fe0000; valaddr_reg:x12; val_offset:90693*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90693*FLEN/8, x13, x9, x10)

inst_30253:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180ffff; valaddr_reg:x12; val_offset:90696*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90696*FLEN/8, x13, x9, x10)

inst_30254:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ff0000; valaddr_reg:x12; val_offset:90699*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90699*FLEN/8, x13, x9, x10)

inst_30255:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61807fff; valaddr_reg:x12; val_offset:90702*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90702*FLEN/8, x13, x9, x10)

inst_30256:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ff8000; valaddr_reg:x12; val_offset:90705*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90705*FLEN/8, x13, x9, x10)

inst_30257:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61803fff; valaddr_reg:x12; val_offset:90708*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90708*FLEN/8, x13, x9, x10)

inst_30258:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffc000; valaddr_reg:x12; val_offset:90711*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90711*FLEN/8, x13, x9, x10)

inst_30259:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61801fff; valaddr_reg:x12; val_offset:90714*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90714*FLEN/8, x13, x9, x10)

inst_30260:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffe000; valaddr_reg:x12; val_offset:90717*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90717*FLEN/8, x13, x9, x10)

inst_30261:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800fff; valaddr_reg:x12; val_offset:90720*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90720*FLEN/8, x13, x9, x10)

inst_30262:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fff000; valaddr_reg:x12; val_offset:90723*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90723*FLEN/8, x13, x9, x10)

inst_30263:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618007ff; valaddr_reg:x12; val_offset:90726*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90726*FLEN/8, x13, x9, x10)

inst_30264:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fff800; valaddr_reg:x12; val_offset:90729*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90729*FLEN/8, x13, x9, x10)

inst_30265:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618003ff; valaddr_reg:x12; val_offset:90732*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90732*FLEN/8, x13, x9, x10)

inst_30266:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffc00; valaddr_reg:x12; val_offset:90735*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90735*FLEN/8, x13, x9, x10)

inst_30267:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618001ff; valaddr_reg:x12; val_offset:90738*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90738*FLEN/8, x13, x9, x10)

inst_30268:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffe00; valaddr_reg:x12; val_offset:90741*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90741*FLEN/8, x13, x9, x10)

inst_30269:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x618000ff; valaddr_reg:x12; val_offset:90744*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90744*FLEN/8, x13, x9, x10)

inst_30270:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffff00; valaddr_reg:x12; val_offset:90747*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90747*FLEN/8, x13, x9, x10)

inst_30271:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180007f; valaddr_reg:x12; val_offset:90750*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90750*FLEN/8, x13, x9, x10)

inst_30272:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffff80; valaddr_reg:x12; val_offset:90753*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90753*FLEN/8, x13, x9, x10)

inst_30273:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180003f; valaddr_reg:x12; val_offset:90756*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90756*FLEN/8, x13, x9, x10)

inst_30274:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffffc0; valaddr_reg:x12; val_offset:90759*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90759*FLEN/8, x13, x9, x10)

inst_30275:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180001f; valaddr_reg:x12; val_offset:90762*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90762*FLEN/8, x13, x9, x10)

inst_30276:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61ffffe0; valaddr_reg:x12; val_offset:90765*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90765*FLEN/8, x13, x9, x10)

inst_30277:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x6180000f; valaddr_reg:x12; val_offset:90768*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90768*FLEN/8, x13, x9, x10)

inst_30278:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffff0; valaddr_reg:x12; val_offset:90771*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90771*FLEN/8, x13, x9, x10)

inst_30279:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800007; valaddr_reg:x12; val_offset:90774*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90774*FLEN/8, x13, x9, x10)

inst_30280:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffff8; valaddr_reg:x12; val_offset:90777*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90777*FLEN/8, x13, x9, x10)

inst_30281:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800003; valaddr_reg:x12; val_offset:90780*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90780*FLEN/8, x13, x9, x10)

inst_30282:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffffc; valaddr_reg:x12; val_offset:90783*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90783*FLEN/8, x13, x9, x10)

inst_30283:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61800001; valaddr_reg:x12; val_offset:90786*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90786*FLEN/8, x13, x9, x10)

inst_30284:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x61fffffe; valaddr_reg:x12; val_offset:90789*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90789*FLEN/8, x13, x9, x10)

inst_30285:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:90792*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90792*FLEN/8, x13, x9, x10)

inst_30286:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f000007; valaddr_reg:x12; val_offset:90795*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90795*FLEN/8, x13, x9, x10)

inst_30287:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:90798*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90798*FLEN/8, x13, x9, x10)

inst_30288:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f000003; valaddr_reg:x12; val_offset:90801*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90801*FLEN/8, x13, x9, x10)

inst_30289:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:90804*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90804*FLEN/8, x13, x9, x10)

inst_30290:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f000001; valaddr_reg:x12; val_offset:90807*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90807*FLEN/8, x13, x9, x10)

inst_30291:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:90810*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90810*FLEN/8, x13, x9, x10)

inst_30292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:90813*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90813*FLEN/8, x13, x9, x10)

inst_30293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f199999; valaddr_reg:x12; val_offset:90816*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90816*FLEN/8, x13, x9, x10)

inst_30294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f666666; valaddr_reg:x12; val_offset:90819*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90819*FLEN/8, x13, x9, x10)

inst_30295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:90822*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90822*FLEN/8, x13, x9, x10)

inst_30296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f444444; valaddr_reg:x12; val_offset:90825*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90825*FLEN/8, x13, x9, x10)

inst_30297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f249249; valaddr_reg:x12; val_offset:90828*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90828*FLEN/8, x13, x9, x10)

inst_30298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:90831*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90831*FLEN/8, x13, x9, x10)

inst_30299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f333333; valaddr_reg:x12; val_offset:90834*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90834*FLEN/8, x13, x9, x10)

inst_30300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e875c74; op2val:0x4072140b;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:90837*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90837*FLEN/8, x13, x9, x10)

inst_30301:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627fffff; valaddr_reg:x12; val_offset:90840*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90840*FLEN/8, x13, x9, x10)

inst_30302:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62000000; valaddr_reg:x12; val_offset:90843*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90843*FLEN/8, x13, x9, x10)

inst_30303:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x623fffff; valaddr_reg:x12; val_offset:90846*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90846*FLEN/8, x13, x9, x10)

inst_30304:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62400000; valaddr_reg:x12; val_offset:90849*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90849*FLEN/8, x13, x9, x10)

inst_30305:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x621fffff; valaddr_reg:x12; val_offset:90852*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90852*FLEN/8, x13, x9, x10)

inst_30306:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62600000; valaddr_reg:x12; val_offset:90855*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90855*FLEN/8, x13, x9, x10)

inst_30307:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x620fffff; valaddr_reg:x12; val_offset:90858*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90858*FLEN/8, x13, x9, x10)

inst_30308:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62700000; valaddr_reg:x12; val_offset:90861*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90861*FLEN/8, x13, x9, x10)

inst_30309:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x6207ffff; valaddr_reg:x12; val_offset:90864*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90864*FLEN/8, x13, x9, x10)

inst_30310:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62780000; valaddr_reg:x12; val_offset:90867*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90867*FLEN/8, x13, x9, x10)

inst_30311:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x6203ffff; valaddr_reg:x12; val_offset:90870*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90870*FLEN/8, x13, x9, x10)

inst_30312:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627c0000; valaddr_reg:x12; val_offset:90873*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90873*FLEN/8, x13, x9, x10)

inst_30313:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x6201ffff; valaddr_reg:x12; val_offset:90876*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90876*FLEN/8, x13, x9, x10)

inst_30314:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627e0000; valaddr_reg:x12; val_offset:90879*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90879*FLEN/8, x13, x9, x10)

inst_30315:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x6200ffff; valaddr_reg:x12; val_offset:90882*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90882*FLEN/8, x13, x9, x10)

inst_30316:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627f0000; valaddr_reg:x12; val_offset:90885*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90885*FLEN/8, x13, x9, x10)

inst_30317:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62007fff; valaddr_reg:x12; val_offset:90888*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90888*FLEN/8, x13, x9, x10)

inst_30318:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627f8000; valaddr_reg:x12; val_offset:90891*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90891*FLEN/8, x13, x9, x10)

inst_30319:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62003fff; valaddr_reg:x12; val_offset:90894*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90894*FLEN/8, x13, x9, x10)

inst_30320:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627fc000; valaddr_reg:x12; val_offset:90897*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90897*FLEN/8, x13, x9, x10)

inst_30321:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62001fff; valaddr_reg:x12; val_offset:90900*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90900*FLEN/8, x13, x9, x10)

inst_30322:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627fe000; valaddr_reg:x12; val_offset:90903*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90903*FLEN/8, x13, x9, x10)

inst_30323:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62000fff; valaddr_reg:x12; val_offset:90906*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90906*FLEN/8, x13, x9, x10)

inst_30324:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627ff000; valaddr_reg:x12; val_offset:90909*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90909*FLEN/8, x13, x9, x10)

inst_30325:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x620007ff; valaddr_reg:x12; val_offset:90912*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90912*FLEN/8, x13, x9, x10)

inst_30326:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627ff800; valaddr_reg:x12; val_offset:90915*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90915*FLEN/8, x13, x9, x10)

inst_30327:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x620003ff; valaddr_reg:x12; val_offset:90918*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90918*FLEN/8, x13, x9, x10)

inst_30328:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627ffc00; valaddr_reg:x12; val_offset:90921*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90921*FLEN/8, x13, x9, x10)

inst_30329:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x620001ff; valaddr_reg:x12; val_offset:90924*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90924*FLEN/8, x13, x9, x10)

inst_30330:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627ffe00; valaddr_reg:x12; val_offset:90927*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90927*FLEN/8, x13, x9, x10)

inst_30331:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x620000ff; valaddr_reg:x12; val_offset:90930*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90930*FLEN/8, x13, x9, x10)

inst_30332:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627fff00; valaddr_reg:x12; val_offset:90933*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90933*FLEN/8, x13, x9, x10)

inst_30333:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x6200007f; valaddr_reg:x12; val_offset:90936*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90936*FLEN/8, x13, x9, x10)

inst_30334:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627fff80; valaddr_reg:x12; val_offset:90939*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90939*FLEN/8, x13, x9, x10)

inst_30335:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x6200003f; valaddr_reg:x12; val_offset:90942*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90942*FLEN/8, x13, x9, x10)

inst_30336:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627fffc0; valaddr_reg:x12; val_offset:90945*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90945*FLEN/8, x13, x9, x10)

inst_30337:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x6200001f; valaddr_reg:x12; val_offset:90948*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90948*FLEN/8, x13, x9, x10)

inst_30338:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627fffe0; valaddr_reg:x12; val_offset:90951*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90951*FLEN/8, x13, x9, x10)

inst_30339:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x6200000f; valaddr_reg:x12; val_offset:90954*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90954*FLEN/8, x13, x9, x10)

inst_30340:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627ffff0; valaddr_reg:x12; val_offset:90957*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90957*FLEN/8, x13, x9, x10)

inst_30341:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62000007; valaddr_reg:x12; val_offset:90960*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90960*FLEN/8, x13, x9, x10)

inst_30342:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627ffff8; valaddr_reg:x12; val_offset:90963*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90963*FLEN/8, x13, x9, x10)

inst_30343:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62000003; valaddr_reg:x12; val_offset:90966*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90966*FLEN/8, x13, x9, x10)

inst_30344:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627ffffc; valaddr_reg:x12; val_offset:90969*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90969*FLEN/8, x13, x9, x10)

inst_30345:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x62000001; valaddr_reg:x12; val_offset:90972*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90972*FLEN/8, x13, x9, x10)

inst_30346:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x627ffffe; valaddr_reg:x12; val_offset:90975*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90975*FLEN/8, x13, x9, x10)

inst_30347:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:90978*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90978*FLEN/8, x13, x9, x10)

inst_30348:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f000007; valaddr_reg:x12; val_offset:90981*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90981*FLEN/8, x13, x9, x10)

inst_30349:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:90984*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90984*FLEN/8, x13, x9, x10)

inst_30350:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f000003; valaddr_reg:x12; val_offset:90987*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90987*FLEN/8, x13, x9, x10)

inst_30351:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:90990*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90990*FLEN/8, x13, x9, x10)

inst_30352:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f000001; valaddr_reg:x12; val_offset:90993*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90993*FLEN/8, x13, x9, x10)

inst_30353:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:90996*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90996*FLEN/8, x13, x9, x10)

inst_30354:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:90999*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90999*FLEN/8, x13, x9, x10)

inst_30355:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f199999; valaddr_reg:x12; val_offset:91002*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91002*FLEN/8, x13, x9, x10)

inst_30356:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f666666; valaddr_reg:x12; val_offset:91005*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91005*FLEN/8, x13, x9, x10)

inst_30357:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:91008*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91008*FLEN/8, x13, x9, x10)

inst_30358:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f444444; valaddr_reg:x12; val_offset:91011*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91011*FLEN/8, x13, x9, x10)

inst_30359:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f249249; valaddr_reg:x12; val_offset:91014*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91014*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_237)
inst_30360:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:91017*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91017*FLEN/8, x13, x9, x10)

inst_30361:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f333333; valaddr_reg:x12; val_offset:91020*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91020*FLEN/8, x13, x9, x10)

inst_30362:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba6fc5; op2val:0x412fc26c;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:91023*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91023*FLEN/8, x13, x9, x10)

inst_30363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ffffff; valaddr_reg:x12; val_offset:91026*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91026*FLEN/8, x13, x9, x10)

inst_30364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62800000; valaddr_reg:x12; val_offset:91029*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91029*FLEN/8, x13, x9, x10)

inst_30365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62bfffff; valaddr_reg:x12; val_offset:91032*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91032*FLEN/8, x13, x9, x10)

inst_30366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62c00000; valaddr_reg:x12; val_offset:91035*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91035*FLEN/8, x13, x9, x10)

inst_30367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x629fffff; valaddr_reg:x12; val_offset:91038*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91038*FLEN/8, x13, x9, x10)

inst_30368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62e00000; valaddr_reg:x12; val_offset:91041*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91041*FLEN/8, x13, x9, x10)

inst_30369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x628fffff; valaddr_reg:x12; val_offset:91044*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91044*FLEN/8, x13, x9, x10)

inst_30370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62f00000; valaddr_reg:x12; val_offset:91047*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91047*FLEN/8, x13, x9, x10)

inst_30371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x6287ffff; valaddr_reg:x12; val_offset:91050*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91050*FLEN/8, x13, x9, x10)

inst_30372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62f80000; valaddr_reg:x12; val_offset:91053*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91053*FLEN/8, x13, x9, x10)

inst_30373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x6283ffff; valaddr_reg:x12; val_offset:91056*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91056*FLEN/8, x13, x9, x10)

inst_30374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fc0000; valaddr_reg:x12; val_offset:91059*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91059*FLEN/8, x13, x9, x10)

inst_30375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x6281ffff; valaddr_reg:x12; val_offset:91062*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91062*FLEN/8, x13, x9, x10)

inst_30376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fe0000; valaddr_reg:x12; val_offset:91065*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91065*FLEN/8, x13, x9, x10)

inst_30377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x6280ffff; valaddr_reg:x12; val_offset:91068*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91068*FLEN/8, x13, x9, x10)

inst_30378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ff0000; valaddr_reg:x12; val_offset:91071*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91071*FLEN/8, x13, x9, x10)

inst_30379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62807fff; valaddr_reg:x12; val_offset:91074*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91074*FLEN/8, x13, x9, x10)

inst_30380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ff8000; valaddr_reg:x12; val_offset:91077*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91077*FLEN/8, x13, x9, x10)

inst_30381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62803fff; valaddr_reg:x12; val_offset:91080*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91080*FLEN/8, x13, x9, x10)

inst_30382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ffc000; valaddr_reg:x12; val_offset:91083*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91083*FLEN/8, x13, x9, x10)

inst_30383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62801fff; valaddr_reg:x12; val_offset:91086*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91086*FLEN/8, x13, x9, x10)

inst_30384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ffe000; valaddr_reg:x12; val_offset:91089*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91089*FLEN/8, x13, x9, x10)

inst_30385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62800fff; valaddr_reg:x12; val_offset:91092*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91092*FLEN/8, x13, x9, x10)

inst_30386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fff000; valaddr_reg:x12; val_offset:91095*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91095*FLEN/8, x13, x9, x10)

inst_30387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x628007ff; valaddr_reg:x12; val_offset:91098*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91098*FLEN/8, x13, x9, x10)

inst_30388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fff800; valaddr_reg:x12; val_offset:91101*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91101*FLEN/8, x13, x9, x10)

inst_30389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x628003ff; valaddr_reg:x12; val_offset:91104*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91104*FLEN/8, x13, x9, x10)

inst_30390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fffc00; valaddr_reg:x12; val_offset:91107*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91107*FLEN/8, x13, x9, x10)

inst_30391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x628001ff; valaddr_reg:x12; val_offset:91110*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91110*FLEN/8, x13, x9, x10)

inst_30392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fffe00; valaddr_reg:x12; val_offset:91113*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91113*FLEN/8, x13, x9, x10)

inst_30393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x628000ff; valaddr_reg:x12; val_offset:91116*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91116*FLEN/8, x13, x9, x10)

inst_30394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ffff00; valaddr_reg:x12; val_offset:91119*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91119*FLEN/8, x13, x9, x10)

inst_30395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x6280007f; valaddr_reg:x12; val_offset:91122*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91122*FLEN/8, x13, x9, x10)

inst_30396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ffff80; valaddr_reg:x12; val_offset:91125*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91125*FLEN/8, x13, x9, x10)

inst_30397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x6280003f; valaddr_reg:x12; val_offset:91128*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91128*FLEN/8, x13, x9, x10)

inst_30398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ffffc0; valaddr_reg:x12; val_offset:91131*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91131*FLEN/8, x13, x9, x10)

inst_30399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x6280001f; valaddr_reg:x12; val_offset:91134*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91134*FLEN/8, x13, x9, x10)

inst_30400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62ffffe0; valaddr_reg:x12; val_offset:91137*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91137*FLEN/8, x13, x9, x10)

inst_30401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x6280000f; valaddr_reg:x12; val_offset:91140*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91140*FLEN/8, x13, x9, x10)

inst_30402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fffff0; valaddr_reg:x12; val_offset:91143*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91143*FLEN/8, x13, x9, x10)

inst_30403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62800007; valaddr_reg:x12; val_offset:91146*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91146*FLEN/8, x13, x9, x10)

inst_30404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fffff8; valaddr_reg:x12; val_offset:91149*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91149*FLEN/8, x13, x9, x10)

inst_30405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62800003; valaddr_reg:x12; val_offset:91152*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91152*FLEN/8, x13, x9, x10)

inst_30406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fffffc; valaddr_reg:x12; val_offset:91155*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91155*FLEN/8, x13, x9, x10)

inst_30407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62800001; valaddr_reg:x12; val_offset:91158*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91158*FLEN/8, x13, x9, x10)

inst_30408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x62fffffe; valaddr_reg:x12; val_offset:91161*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91161*FLEN/8, x13, x9, x10)

inst_30409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:91164*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91164*FLEN/8, x13, x9, x10)

inst_30410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f000007; valaddr_reg:x12; val_offset:91167*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91167*FLEN/8, x13, x9, x10)

inst_30411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:91170*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91170*FLEN/8, x13, x9, x10)

inst_30412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f000003; valaddr_reg:x12; val_offset:91173*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91173*FLEN/8, x13, x9, x10)

inst_30413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:91176*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91176*FLEN/8, x13, x9, x10)

inst_30414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f000001; valaddr_reg:x12; val_offset:91179*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91179*FLEN/8, x13, x9, x10)

inst_30415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:91182*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91182*FLEN/8, x13, x9, x10)

inst_30416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:91185*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91185*FLEN/8, x13, x9, x10)

inst_30417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f199999; valaddr_reg:x12; val_offset:91188*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91188*FLEN/8, x13, x9, x10)

inst_30418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f666666; valaddr_reg:x12; val_offset:91191*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91191*FLEN/8, x13, x9, x10)

inst_30419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:91194*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91194*FLEN/8, x13, x9, x10)

inst_30420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f444444; valaddr_reg:x12; val_offset:91197*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91197*FLEN/8, x13, x9, x10)

inst_30421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f249249; valaddr_reg:x12; val_offset:91200*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91200*FLEN/8, x13, x9, x10)

inst_30422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:91203*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91203*FLEN/8, x13, x9, x10)

inst_30423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f333333; valaddr_reg:x12; val_offset:91206*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91206*FLEN/8, x13, x9, x10)

inst_30424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04d221; op2val:0x3ff6b552;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:91209*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91209*FLEN/8, x13, x9, x10)

inst_30425:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fffff; valaddr_reg:x12; val_offset:91212*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91212*FLEN/8, x13, x9, x10)

inst_30426:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63000000; valaddr_reg:x12; val_offset:91215*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91215*FLEN/8, x13, x9, x10)

inst_30427:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x633fffff; valaddr_reg:x12; val_offset:91218*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91218*FLEN/8, x13, x9, x10)

inst_30428:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63400000; valaddr_reg:x12; val_offset:91221*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91221*FLEN/8, x13, x9, x10)

inst_30429:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x631fffff; valaddr_reg:x12; val_offset:91224*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91224*FLEN/8, x13, x9, x10)

inst_30430:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63600000; valaddr_reg:x12; val_offset:91227*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91227*FLEN/8, x13, x9, x10)

inst_30431:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x630fffff; valaddr_reg:x12; val_offset:91230*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91230*FLEN/8, x13, x9, x10)

inst_30432:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63700000; valaddr_reg:x12; val_offset:91233*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91233*FLEN/8, x13, x9, x10)

inst_30433:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x6307ffff; valaddr_reg:x12; val_offset:91236*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91236*FLEN/8, x13, x9, x10)

inst_30434:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63780000; valaddr_reg:x12; val_offset:91239*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91239*FLEN/8, x13, x9, x10)

inst_30435:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x6303ffff; valaddr_reg:x12; val_offset:91242*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91242*FLEN/8, x13, x9, x10)

inst_30436:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637c0000; valaddr_reg:x12; val_offset:91245*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91245*FLEN/8, x13, x9, x10)

inst_30437:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x6301ffff; valaddr_reg:x12; val_offset:91248*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91248*FLEN/8, x13, x9, x10)

inst_30438:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637e0000; valaddr_reg:x12; val_offset:91251*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91251*FLEN/8, x13, x9, x10)

inst_30439:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x6300ffff; valaddr_reg:x12; val_offset:91254*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91254*FLEN/8, x13, x9, x10)

inst_30440:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637f0000; valaddr_reg:x12; val_offset:91257*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91257*FLEN/8, x13, x9, x10)

inst_30441:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63007fff; valaddr_reg:x12; val_offset:91260*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91260*FLEN/8, x13, x9, x10)

inst_30442:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637f8000; valaddr_reg:x12; val_offset:91263*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91263*FLEN/8, x13, x9, x10)

inst_30443:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63003fff; valaddr_reg:x12; val_offset:91266*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91266*FLEN/8, x13, x9, x10)

inst_30444:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fc000; valaddr_reg:x12; val_offset:91269*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91269*FLEN/8, x13, x9, x10)

inst_30445:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63001fff; valaddr_reg:x12; val_offset:91272*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91272*FLEN/8, x13, x9, x10)

inst_30446:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fe000; valaddr_reg:x12; val_offset:91275*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91275*FLEN/8, x13, x9, x10)

inst_30447:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63000fff; valaddr_reg:x12; val_offset:91278*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91278*FLEN/8, x13, x9, x10)

inst_30448:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ff000; valaddr_reg:x12; val_offset:91281*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91281*FLEN/8, x13, x9, x10)

inst_30449:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x630007ff; valaddr_reg:x12; val_offset:91284*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91284*FLEN/8, x13, x9, x10)

inst_30450:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ff800; valaddr_reg:x12; val_offset:91287*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91287*FLEN/8, x13, x9, x10)

inst_30451:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x630003ff; valaddr_reg:x12; val_offset:91290*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91290*FLEN/8, x13, x9, x10)

inst_30452:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffc00; valaddr_reg:x12; val_offset:91293*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91293*FLEN/8, x13, x9, x10)

inst_30453:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x630001ff; valaddr_reg:x12; val_offset:91296*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91296*FLEN/8, x13, x9, x10)

inst_30454:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffe00; valaddr_reg:x12; val_offset:91299*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91299*FLEN/8, x13, x9, x10)

inst_30455:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x630000ff; valaddr_reg:x12; val_offset:91302*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91302*FLEN/8, x13, x9, x10)

inst_30456:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fff00; valaddr_reg:x12; val_offset:91305*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91305*FLEN/8, x13, x9, x10)

inst_30457:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x6300007f; valaddr_reg:x12; val_offset:91308*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91308*FLEN/8, x13, x9, x10)

inst_30458:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fff80; valaddr_reg:x12; val_offset:91311*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91311*FLEN/8, x13, x9, x10)

inst_30459:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x6300003f; valaddr_reg:x12; val_offset:91314*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91314*FLEN/8, x13, x9, x10)

inst_30460:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fffc0; valaddr_reg:x12; val_offset:91317*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91317*FLEN/8, x13, x9, x10)

inst_30461:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x6300001f; valaddr_reg:x12; val_offset:91320*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91320*FLEN/8, x13, x9, x10)

inst_30462:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637fffe0; valaddr_reg:x12; val_offset:91323*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91323*FLEN/8, x13, x9, x10)

inst_30463:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x6300000f; valaddr_reg:x12; val_offset:91326*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91326*FLEN/8, x13, x9, x10)

inst_30464:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffff0; valaddr_reg:x12; val_offset:91329*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91329*FLEN/8, x13, x9, x10)

inst_30465:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63000007; valaddr_reg:x12; val_offset:91332*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91332*FLEN/8, x13, x9, x10)

inst_30466:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffff8; valaddr_reg:x12; val_offset:91335*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91335*FLEN/8, x13, x9, x10)

inst_30467:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63000003; valaddr_reg:x12; val_offset:91338*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91338*FLEN/8, x13, x9, x10)

inst_30468:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffffc; valaddr_reg:x12; val_offset:91341*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91341*FLEN/8, x13, x9, x10)

inst_30469:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x63000001; valaddr_reg:x12; val_offset:91344*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91344*FLEN/8, x13, x9, x10)

inst_30470:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x637ffffe; valaddr_reg:x12; val_offset:91347*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91347*FLEN/8, x13, x9, x10)

inst_30471:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:91350*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91350*FLEN/8, x13, x9, x10)

inst_30472:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f000007; valaddr_reg:x12; val_offset:91353*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91353*FLEN/8, x13, x9, x10)

inst_30473:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:91356*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91356*FLEN/8, x13, x9, x10)

inst_30474:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f000003; valaddr_reg:x12; val_offset:91359*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91359*FLEN/8, x13, x9, x10)

inst_30475:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:91362*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91362*FLEN/8, x13, x9, x10)

inst_30476:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f000001; valaddr_reg:x12; val_offset:91365*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91365*FLEN/8, x13, x9, x10)

inst_30477:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:91368*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91368*FLEN/8, x13, x9, x10)

inst_30478:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:91371*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91371*FLEN/8, x13, x9, x10)

inst_30479:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f199999; valaddr_reg:x12; val_offset:91374*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91374*FLEN/8, x13, x9, x10)

inst_30480:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f666666; valaddr_reg:x12; val_offset:91377*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91377*FLEN/8, x13, x9, x10)

inst_30481:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:91380*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91380*FLEN/8, x13, x9, x10)

inst_30482:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f444444; valaddr_reg:x12; val_offset:91383*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91383*FLEN/8, x13, x9, x10)

inst_30483:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f249249; valaddr_reg:x12; val_offset:91386*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91386*FLEN/8, x13, x9, x10)

inst_30484:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:91389*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91389*FLEN/8, x13, x9, x10)

inst_30485:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f333333; valaddr_reg:x12; val_offset:91392*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91392*FLEN/8, x13, x9, x10)

inst_30486:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e84a6a2; op2val:0x40770637;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:91395*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91395*FLEN/8, x13, x9, x10)

inst_30487:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ffffff; valaddr_reg:x12; val_offset:91398*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91398*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_238)
inst_30488:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63800000; valaddr_reg:x12; val_offset:91401*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91401*FLEN/8, x13, x9, x10)

inst_30489:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63bfffff; valaddr_reg:x12; val_offset:91404*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91404*FLEN/8, x13, x9, x10)

inst_30490:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63c00000; valaddr_reg:x12; val_offset:91407*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91407*FLEN/8, x13, x9, x10)

inst_30491:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x639fffff; valaddr_reg:x12; val_offset:91410*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91410*FLEN/8, x13, x9, x10)

inst_30492:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63e00000; valaddr_reg:x12; val_offset:91413*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91413*FLEN/8, x13, x9, x10)

inst_30493:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x638fffff; valaddr_reg:x12; val_offset:91416*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91416*FLEN/8, x13, x9, x10)

inst_30494:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63f00000; valaddr_reg:x12; val_offset:91419*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91419*FLEN/8, x13, x9, x10)

inst_30495:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x6387ffff; valaddr_reg:x12; val_offset:91422*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91422*FLEN/8, x13, x9, x10)

inst_30496:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63f80000; valaddr_reg:x12; val_offset:91425*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91425*FLEN/8, x13, x9, x10)

inst_30497:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x6383ffff; valaddr_reg:x12; val_offset:91428*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91428*FLEN/8, x13, x9, x10)

inst_30498:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fc0000; valaddr_reg:x12; val_offset:91431*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91431*FLEN/8, x13, x9, x10)

inst_30499:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x6381ffff; valaddr_reg:x12; val_offset:91434*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91434*FLEN/8, x13, x9, x10)

inst_30500:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fe0000; valaddr_reg:x12; val_offset:91437*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91437*FLEN/8, x13, x9, x10)

inst_30501:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x6380ffff; valaddr_reg:x12; val_offset:91440*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91440*FLEN/8, x13, x9, x10)

inst_30502:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ff0000; valaddr_reg:x12; val_offset:91443*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91443*FLEN/8, x13, x9, x10)

inst_30503:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63807fff; valaddr_reg:x12; val_offset:91446*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91446*FLEN/8, x13, x9, x10)

inst_30504:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ff8000; valaddr_reg:x12; val_offset:91449*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91449*FLEN/8, x13, x9, x10)

inst_30505:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63803fff; valaddr_reg:x12; val_offset:91452*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91452*FLEN/8, x13, x9, x10)

inst_30506:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ffc000; valaddr_reg:x12; val_offset:91455*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91455*FLEN/8, x13, x9, x10)

inst_30507:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63801fff; valaddr_reg:x12; val_offset:91458*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91458*FLEN/8, x13, x9, x10)

inst_30508:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ffe000; valaddr_reg:x12; val_offset:91461*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91461*FLEN/8, x13, x9, x10)

inst_30509:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63800fff; valaddr_reg:x12; val_offset:91464*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91464*FLEN/8, x13, x9, x10)

inst_30510:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fff000; valaddr_reg:x12; val_offset:91467*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91467*FLEN/8, x13, x9, x10)

inst_30511:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x638007ff; valaddr_reg:x12; val_offset:91470*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91470*FLEN/8, x13, x9, x10)

inst_30512:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fff800; valaddr_reg:x12; val_offset:91473*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91473*FLEN/8, x13, x9, x10)

inst_30513:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x638003ff; valaddr_reg:x12; val_offset:91476*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91476*FLEN/8, x13, x9, x10)

inst_30514:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fffc00; valaddr_reg:x12; val_offset:91479*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91479*FLEN/8, x13, x9, x10)

inst_30515:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x638001ff; valaddr_reg:x12; val_offset:91482*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91482*FLEN/8, x13, x9, x10)

inst_30516:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fffe00; valaddr_reg:x12; val_offset:91485*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91485*FLEN/8, x13, x9, x10)

inst_30517:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x638000ff; valaddr_reg:x12; val_offset:91488*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91488*FLEN/8, x13, x9, x10)

inst_30518:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ffff00; valaddr_reg:x12; val_offset:91491*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91491*FLEN/8, x13, x9, x10)

inst_30519:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x6380007f; valaddr_reg:x12; val_offset:91494*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91494*FLEN/8, x13, x9, x10)

inst_30520:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ffff80; valaddr_reg:x12; val_offset:91497*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91497*FLEN/8, x13, x9, x10)

inst_30521:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x6380003f; valaddr_reg:x12; val_offset:91500*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91500*FLEN/8, x13, x9, x10)

inst_30522:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ffffc0; valaddr_reg:x12; val_offset:91503*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91503*FLEN/8, x13, x9, x10)

inst_30523:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x6380001f; valaddr_reg:x12; val_offset:91506*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91506*FLEN/8, x13, x9, x10)

inst_30524:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63ffffe0; valaddr_reg:x12; val_offset:91509*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91509*FLEN/8, x13, x9, x10)

inst_30525:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x6380000f; valaddr_reg:x12; val_offset:91512*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91512*FLEN/8, x13, x9, x10)

inst_30526:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fffff0; valaddr_reg:x12; val_offset:91515*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91515*FLEN/8, x13, x9, x10)

inst_30527:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63800007; valaddr_reg:x12; val_offset:91518*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91518*FLEN/8, x13, x9, x10)

inst_30528:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fffff8; valaddr_reg:x12; val_offset:91521*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91521*FLEN/8, x13, x9, x10)

inst_30529:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63800003; valaddr_reg:x12; val_offset:91524*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91524*FLEN/8, x13, x9, x10)

inst_30530:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fffffc; valaddr_reg:x12; val_offset:91527*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91527*FLEN/8, x13, x9, x10)

inst_30531:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63800001; valaddr_reg:x12; val_offset:91530*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91530*FLEN/8, x13, x9, x10)

inst_30532:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x63fffffe; valaddr_reg:x12; val_offset:91533*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91533*FLEN/8, x13, x9, x10)

inst_30533:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:91536*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91536*FLEN/8, x13, x9, x10)

inst_30534:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f000007; valaddr_reg:x12; val_offset:91539*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91539*FLEN/8, x13, x9, x10)

inst_30535:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:91542*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91542*FLEN/8, x13, x9, x10)

inst_30536:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f000003; valaddr_reg:x12; val_offset:91545*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91545*FLEN/8, x13, x9, x10)

inst_30537:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:91548*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91548*FLEN/8, x13, x9, x10)

inst_30538:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f000001; valaddr_reg:x12; val_offset:91551*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91551*FLEN/8, x13, x9, x10)

inst_30539:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:91554*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91554*FLEN/8, x13, x9, x10)

inst_30540:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:91557*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91557*FLEN/8, x13, x9, x10)

inst_30541:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f199999; valaddr_reg:x12; val_offset:91560*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91560*FLEN/8, x13, x9, x10)

inst_30542:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f666666; valaddr_reg:x12; val_offset:91563*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91563*FLEN/8, x13, x9, x10)

inst_30543:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:91566*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91566*FLEN/8, x13, x9, x10)

inst_30544:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f444444; valaddr_reg:x12; val_offset:91569*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91569*FLEN/8, x13, x9, x10)

inst_30545:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f249249; valaddr_reg:x12; val_offset:91572*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91572*FLEN/8, x13, x9, x10)

inst_30546:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:91575*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91575*FLEN/8, x13, x9, x10)

inst_30547:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f333333; valaddr_reg:x12; val_offset:91578*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91578*FLEN/8, x13, x9, x10)

inst_30548:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e08a211; op2val:0x40efd324;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:91581*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91581*FLEN/8, x13, x9, x10)

inst_30549:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647fffff; valaddr_reg:x12; val_offset:91584*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91584*FLEN/8, x13, x9, x10)

inst_30550:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64000000; valaddr_reg:x12; val_offset:91587*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91587*FLEN/8, x13, x9, x10)

inst_30551:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x643fffff; valaddr_reg:x12; val_offset:91590*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91590*FLEN/8, x13, x9, x10)

inst_30552:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64400000; valaddr_reg:x12; val_offset:91593*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91593*FLEN/8, x13, x9, x10)

inst_30553:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x641fffff; valaddr_reg:x12; val_offset:91596*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91596*FLEN/8, x13, x9, x10)

inst_30554:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64600000; valaddr_reg:x12; val_offset:91599*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91599*FLEN/8, x13, x9, x10)

inst_30555:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x640fffff; valaddr_reg:x12; val_offset:91602*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91602*FLEN/8, x13, x9, x10)

inst_30556:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64700000; valaddr_reg:x12; val_offset:91605*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91605*FLEN/8, x13, x9, x10)

inst_30557:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x6407ffff; valaddr_reg:x12; val_offset:91608*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91608*FLEN/8, x13, x9, x10)

inst_30558:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64780000; valaddr_reg:x12; val_offset:91611*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91611*FLEN/8, x13, x9, x10)

inst_30559:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x6403ffff; valaddr_reg:x12; val_offset:91614*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91614*FLEN/8, x13, x9, x10)

inst_30560:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647c0000; valaddr_reg:x12; val_offset:91617*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91617*FLEN/8, x13, x9, x10)

inst_30561:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x6401ffff; valaddr_reg:x12; val_offset:91620*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91620*FLEN/8, x13, x9, x10)

inst_30562:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647e0000; valaddr_reg:x12; val_offset:91623*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91623*FLEN/8, x13, x9, x10)

inst_30563:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x6400ffff; valaddr_reg:x12; val_offset:91626*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91626*FLEN/8, x13, x9, x10)

inst_30564:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647f0000; valaddr_reg:x12; val_offset:91629*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91629*FLEN/8, x13, x9, x10)

inst_30565:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64007fff; valaddr_reg:x12; val_offset:91632*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91632*FLEN/8, x13, x9, x10)

inst_30566:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647f8000; valaddr_reg:x12; val_offset:91635*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91635*FLEN/8, x13, x9, x10)

inst_30567:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64003fff; valaddr_reg:x12; val_offset:91638*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91638*FLEN/8, x13, x9, x10)

inst_30568:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647fc000; valaddr_reg:x12; val_offset:91641*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91641*FLEN/8, x13, x9, x10)

inst_30569:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64001fff; valaddr_reg:x12; val_offset:91644*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91644*FLEN/8, x13, x9, x10)

inst_30570:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647fe000; valaddr_reg:x12; val_offset:91647*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91647*FLEN/8, x13, x9, x10)

inst_30571:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64000fff; valaddr_reg:x12; val_offset:91650*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91650*FLEN/8, x13, x9, x10)

inst_30572:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647ff000; valaddr_reg:x12; val_offset:91653*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91653*FLEN/8, x13, x9, x10)

inst_30573:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x640007ff; valaddr_reg:x12; val_offset:91656*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91656*FLEN/8, x13, x9, x10)

inst_30574:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647ff800; valaddr_reg:x12; val_offset:91659*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91659*FLEN/8, x13, x9, x10)

inst_30575:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x640003ff; valaddr_reg:x12; val_offset:91662*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91662*FLEN/8, x13, x9, x10)

inst_30576:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647ffc00; valaddr_reg:x12; val_offset:91665*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91665*FLEN/8, x13, x9, x10)

inst_30577:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x640001ff; valaddr_reg:x12; val_offset:91668*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91668*FLEN/8, x13, x9, x10)

inst_30578:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647ffe00; valaddr_reg:x12; val_offset:91671*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91671*FLEN/8, x13, x9, x10)

inst_30579:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x640000ff; valaddr_reg:x12; val_offset:91674*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91674*FLEN/8, x13, x9, x10)

inst_30580:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647fff00; valaddr_reg:x12; val_offset:91677*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91677*FLEN/8, x13, x9, x10)

inst_30581:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x6400007f; valaddr_reg:x12; val_offset:91680*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91680*FLEN/8, x13, x9, x10)

inst_30582:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647fff80; valaddr_reg:x12; val_offset:91683*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91683*FLEN/8, x13, x9, x10)

inst_30583:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x6400003f; valaddr_reg:x12; val_offset:91686*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91686*FLEN/8, x13, x9, x10)

inst_30584:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647fffc0; valaddr_reg:x12; val_offset:91689*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91689*FLEN/8, x13, x9, x10)

inst_30585:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x6400001f; valaddr_reg:x12; val_offset:91692*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91692*FLEN/8, x13, x9, x10)

inst_30586:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647fffe0; valaddr_reg:x12; val_offset:91695*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91695*FLEN/8, x13, x9, x10)

inst_30587:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x6400000f; valaddr_reg:x12; val_offset:91698*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91698*FLEN/8, x13, x9, x10)

inst_30588:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647ffff0; valaddr_reg:x12; val_offset:91701*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91701*FLEN/8, x13, x9, x10)

inst_30589:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64000007; valaddr_reg:x12; val_offset:91704*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91704*FLEN/8, x13, x9, x10)

inst_30590:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647ffff8; valaddr_reg:x12; val_offset:91707*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91707*FLEN/8, x13, x9, x10)

inst_30591:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64000003; valaddr_reg:x12; val_offset:91710*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91710*FLEN/8, x13, x9, x10)

inst_30592:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647ffffc; valaddr_reg:x12; val_offset:91713*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91713*FLEN/8, x13, x9, x10)

inst_30593:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x64000001; valaddr_reg:x12; val_offset:91716*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91716*FLEN/8, x13, x9, x10)

inst_30594:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x647ffffe; valaddr_reg:x12; val_offset:91719*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91719*FLEN/8, x13, x9, x10)

inst_30595:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f7ffff8; valaddr_reg:x12; val_offset:91722*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91722*FLEN/8, x13, x9, x10)

inst_30596:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f000007; valaddr_reg:x12; val_offset:91725*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91725*FLEN/8, x13, x9, x10)

inst_30597:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f7ffffc; valaddr_reg:x12; val_offset:91728*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91728*FLEN/8, x13, x9, x10)

inst_30598:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f000003; valaddr_reg:x12; val_offset:91731*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91731*FLEN/8, x13, x9, x10)

inst_30599:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f7ffffe; valaddr_reg:x12; val_offset:91734*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91734*FLEN/8, x13, x9, x10)

inst_30600:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f000001; valaddr_reg:x12; val_offset:91737*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91737*FLEN/8, x13, x9, x10)

inst_30601:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f36db6d; valaddr_reg:x12; val_offset:91740*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91740*FLEN/8, x13, x9, x10)

inst_30602:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f6db6db; valaddr_reg:x12; val_offset:91743*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91743*FLEN/8, x13, x9, x10)

inst_30603:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f199999; valaddr_reg:x12; val_offset:91746*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91746*FLEN/8, x13, x9, x10)

inst_30604:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f666666; valaddr_reg:x12; val_offset:91749*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91749*FLEN/8, x13, x9, x10)

inst_30605:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f3bbbbb; valaddr_reg:x12; val_offset:91752*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91752*FLEN/8, x13, x9, x10)

inst_30606:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f444444; valaddr_reg:x12; val_offset:91755*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91755*FLEN/8, x13, x9, x10)

inst_30607:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f249249; valaddr_reg:x12; val_offset:91758*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91758*FLEN/8, x13, x9, x10)

inst_30608:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f5b6db6; valaddr_reg:x12; val_offset:91761*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91761*FLEN/8, x13, x9, x10)

inst_30609:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f333333; valaddr_reg:x12; val_offset:91764*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91764*FLEN/8, x13, x9, x10)

inst_30610:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1f696e; op2val:0x3fcd8e3c;
op3val:0x7f4ccccc; valaddr_reg:x12; val_offset:91767*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91767*FLEN/8, x13, x9, x10)

inst_30611:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64ffffff; valaddr_reg:x12; val_offset:91770*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91770*FLEN/8, x13, x9, x10)

inst_30612:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64800000; valaddr_reg:x12; val_offset:91773*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91773*FLEN/8, x13, x9, x10)

inst_30613:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64bfffff; valaddr_reg:x12; val_offset:91776*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91776*FLEN/8, x13, x9, x10)

inst_30614:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64c00000; valaddr_reg:x12; val_offset:91779*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91779*FLEN/8, x13, x9, x10)

inst_30615:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x649fffff; valaddr_reg:x12; val_offset:91782*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91782*FLEN/8, x13, x9, x10)

RVTEST_SIGBASE(x9,signature_x9_239)
inst_30616:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64e00000; valaddr_reg:x12; val_offset:91785*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91785*FLEN/8, x13, x9, x10)

inst_30617:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x648fffff; valaddr_reg:x12; val_offset:91788*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91788*FLEN/8, x13, x9, x10)

inst_30618:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64f00000; valaddr_reg:x12; val_offset:91791*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91791*FLEN/8, x13, x9, x10)

inst_30619:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x6487ffff; valaddr_reg:x12; val_offset:91794*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91794*FLEN/8, x13, x9, x10)

inst_30620:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64f80000; valaddr_reg:x12; val_offset:91797*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91797*FLEN/8, x13, x9, x10)

inst_30621:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x6483ffff; valaddr_reg:x12; val_offset:91800*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91800*FLEN/8, x13, x9, x10)

inst_30622:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64fc0000; valaddr_reg:x12; val_offset:91803*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91803*FLEN/8, x13, x9, x10)

inst_30623:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x6481ffff; valaddr_reg:x12; val_offset:91806*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91806*FLEN/8, x13, x9, x10)

inst_30624:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64fe0000; valaddr_reg:x12; val_offset:91809*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91809*FLEN/8, x13, x9, x10)

inst_30625:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x6480ffff; valaddr_reg:x12; val_offset:91812*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91812*FLEN/8, x13, x9, x10)

inst_30626:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64ff0000; valaddr_reg:x12; val_offset:91815*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91815*FLEN/8, x13, x9, x10)

inst_30627:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64807fff; valaddr_reg:x12; val_offset:91818*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91818*FLEN/8, x13, x9, x10)

inst_30628:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64ff8000; valaddr_reg:x12; val_offset:91821*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91821*FLEN/8, x13, x9, x10)

inst_30629:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64803fff; valaddr_reg:x12; val_offset:91824*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91824*FLEN/8, x13, x9, x10)

inst_30630:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64ffc000; valaddr_reg:x12; val_offset:91827*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91827*FLEN/8, x13, x9, x10)

inst_30631:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64801fff; valaddr_reg:x12; val_offset:91830*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91830*FLEN/8, x13, x9, x10)

inst_30632:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64ffe000; valaddr_reg:x12; val_offset:91833*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91833*FLEN/8, x13, x9, x10)

inst_30633:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64800fff; valaddr_reg:x12; val_offset:91836*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91836*FLEN/8, x13, x9, x10)

inst_30634:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64fff000; valaddr_reg:x12; val_offset:91839*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91839*FLEN/8, x13, x9, x10)

inst_30635:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x648007ff; valaddr_reg:x12; val_offset:91842*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91842*FLEN/8, x13, x9, x10)

inst_30636:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64fff800; valaddr_reg:x12; val_offset:91845*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91845*FLEN/8, x13, x9, x10)

inst_30637:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x648003ff; valaddr_reg:x12; val_offset:91848*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91848*FLEN/8, x13, x9, x10)

inst_30638:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3104df; op2val:0x40b91c2b;
op3val:0x64fffc00; valaddr_reg:x12; val_offset:91851*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 91851*FLEN/8, x13, x9, x10)

#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1594097663,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1601961984,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593966591,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602093056,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593901055,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602158592,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593868287,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602191360,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593851903,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602207744,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593843711,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602215936,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593839615,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602220032,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593837567,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602222080,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593836543,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602223104,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593836031,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602223616,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593835775,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602223872,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593835647,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602224000,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593835583,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602224064,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593835551,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602224096,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593835535,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602224112,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593835527,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602224120,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593835523,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602224124,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1593835521,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(1602224126,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2139095032,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2130706439,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2139095036,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2130706435,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2139095038,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2130706433,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2134301549,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2137896667,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2132384153,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2137417318,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2134621115,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2135180356,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2133103177,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2136698294,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2134061875,32,FLEN)
NAN_BOXED(2124423855,32,FLEN)
NAN_BOXED(1078763632,32,FLEN)
NAN_BOXED(2135739596,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612735,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224128,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1606418431,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1606418432,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1604321279,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1608515584,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1603272703,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1609564160,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602748415,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610088448,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602486271,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610350592,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602355199,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610481664,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602289663,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610547200,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602256895,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610579968,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602240511,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610596352,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602232319,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610604544,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602228223,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610608640,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602226175,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610610688,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602225151,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610611712,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224639,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612224,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224383,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612480,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224255,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612608,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224191,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612672,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224159,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612704,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224143,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612720,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224135,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612728,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224131,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612732,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1602224129,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(1610612734,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2139095032,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2130706439,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2139095036,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2130706435,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2139095038,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2130706433,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2134301549,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2137896667,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2132384153,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2137417318,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2134621115,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2135180356,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2133103177,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2136698294,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2134061875,32,FLEN)
NAN_BOXED(2126427187,32,FLEN)
NAN_BOXED(1076614042,32,FLEN)
NAN_BOXED(2135739596,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1619001343,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1610612736,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1614807039,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1614807040,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1612709887,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1616904192,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1611661311,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1617952768,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1611137023,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1618477056,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1610874879,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1618739200,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1610743807,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1618870272,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
NAN_BOXED(1069909126,32,FLEN)
NAN_BOXED(1610678271,32,FLEN)
NAN_BOXED(2133190185,32,FLEN)
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NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2134301549,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2137896667,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2132384153,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2137417318,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2134621115,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2135180356,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2133103177,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2136698294,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2134061875,32,FLEN)
NAN_BOXED(2117141727,32,FLEN)
NAN_BOXED(1085873195,32,FLEN)
NAN_BOXED(2135739596,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702887423,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694498816,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1698693119,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1698693120,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1696595967,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1700790272,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1695547391,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1701838848,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1695023103,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702363136,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694760959,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702625280,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694629887,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702756352,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694564351,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702821888,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694531583,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702854656,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694515199,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702871040,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694507007,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702879232,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694502911,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702883328,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694500863,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702885376,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694499839,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702886400,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694499327,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702886912,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694499071,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702887168,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1694498943,32,FLEN)
NAN_BOXED(2123134936,32,FLEN)
NAN_BOXED(1080641262,32,FLEN)
NAN_BOXED(1702887296,32,FLEN)

RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_7:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_8:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_9:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_10:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_11:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_12:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_13:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_14:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_15:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_16:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_17:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_18:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_19:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_20:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_21:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_22:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_23:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_24:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_25:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_26:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_27:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_28:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_29:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_30:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_31:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_32:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_33:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_34:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_35:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_36:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_37:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_38:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_39:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_40:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_41:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_42:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_43:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_44:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_45:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_46:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_47:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_48:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_49:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_50:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_51:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_52:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_53:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_54:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_55:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_56:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_57:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_58:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_59:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_60:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_61:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_62:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_63:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_64:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_65:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_66:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_67:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_68:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_69:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_70:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_71:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_72:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_73:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_74:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_75:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_76:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_77:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_78:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_79:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_80:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_81:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_82:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_83:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_84:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_85:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_86:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_87:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_88:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_89:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_90:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_91:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_92:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_93:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_94:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_95:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_96:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_97:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_98:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_99:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_100:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_101:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_102:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_103:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_104:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_105:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_106:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_107:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_108:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_109:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_110:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_111:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_112:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_113:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_114:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_115:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_116:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_117:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_118:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_119:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_120:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_121:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_122:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_123:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_124:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_125:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_126:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_127:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_128:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_129:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_130:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_131:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_132:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_133:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_134:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_135:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_136:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_137:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_138:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_139:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_140:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_141:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_142:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_143:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_144:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_145:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_146:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_147:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_148:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_149:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_150:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_151:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_152:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_153:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_154:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_155:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_156:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_157:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_158:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_159:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_160:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_161:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_162:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_163:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_164:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_165:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_166:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_167:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_168:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_169:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_170:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_171:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_172:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_173:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_174:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_175:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_176:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_177:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_178:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_179:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_180:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_181:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_182:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_183:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_184:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_185:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_186:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_187:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_188:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_189:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_190:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_191:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_192:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_193:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_194:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_195:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_196:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_197:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_198:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_199:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_200:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_201:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_202:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_203:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_204:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_205:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_206:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_207:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_208:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_209:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_210:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_211:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_212:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_213:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_214:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_215:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_216:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_217:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_218:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_219:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_220:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_221:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_222:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_223:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_224:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_225:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_226:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_227:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_228:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_229:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_230:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_231:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_232:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_233:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_234:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_235:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_236:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_237:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_238:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_239:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_240:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_241:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_242:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_243:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_244:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_245:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_246:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_247:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_248:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_249:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_250:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_251:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_252:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_253:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_254:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_255:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_256:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_257:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_258:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_259:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_260:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_261:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_262:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_263:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_264:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_265:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_266:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_267:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_268:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_269:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_270:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_271:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_272:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_273:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_274:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_275:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_276:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_277:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_278:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_279:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_280:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_281:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_282:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_283:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_284:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_285:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_286:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_287:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_288:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_289:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_290:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_291:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_292:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_293:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_294:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_295:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_296:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_297:
    .fill 180*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
